VulnerabilityDeferred
CVE-2024-28956
Exposure of Sensitive Information in Shared Microarchitectural Structures during Transient Execution for some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local access.
MEDIUM 5.7EPSS 0.40%
Does this matter?
Lower severity and a low EPSS score (0.40%). Track it; it rarely justifies an emergency change on its own.
Description
Exposure of Sensitive Information in Shared Microarchitectural Structures during Transient Execution for some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local access.
- CVSS 4.0
- 5.7 MEDIUMCVSS:4.0/AV:L/AC:H/AT:P/PR:L/UI:N/VC:H/VI:N/VA:N/SC:N/SI:N/SA:N/E:X/CR:X/IR:X/AR:X/MAV:X/MAC:X/MAT:X/MPR:X/MUI:X/MVC:X/M
- EPSS
- 0.40% probability · 34th percentile
- CISA KEV
- Not listed
- Source
- secure@intel.com
References
- https://intel.com/content/www/us/en/security-center/advisory/intel-sa-01153.html
- http://www.openwall.com/lists/oss-security/2025/05/12/5
- http://xenbits.xen.org/xsa/advisory-469.html
- https://lists.debian.org/debian-lts-announce/2025/05/msg00021.html
- https://lists.debian.org/debian-lts-announce/2025/08/msg00010.html
- https://lists.debian.org/debian-lts-announce/2025/10/msg00007.html
- https://cert-portal.siemens.com/productcert/html/ssa-019113.html
Source: NVD record, EPSS from FIRST.org, KEV from CISA. Refreshed daily.