SOC status:Duty analyst on shift

UK Cyber Defence
VulnerabilityModified

CVE-2023-5138

Glitch detection is not enabled by default for the CortexM33 core in Silicon Labs secure vault high parts EFx32xG2xB, except EFR32xG21B.

MEDIUM 6.8EPSS 0.27%

Does this matter?

Lower severity and a low EPSS score (0.27%). Track it; it rarely justifies an emergency change on its own.

Description

Glitch detection is not enabled by default for the CortexM33 core in Silicon Labs secure vault high parts EFx32xG2xB, except EFR32xG21B.

CVSS 3.1
6.8 MEDIUMCVSS:3.1/AV:P/AC:L/PR:N/UI:N/S:U/C:H/I:H/A:H
EPSS
0.27% probability · 20th percentile
CISA KEV
Not listed
Weakness
CWE-1319, CWE-909
Affected
silabs/gecko software development kit
Source
product-security@silabs.com

Source: NVD record, EPSS from FIRST.org, KEV from CISA. Refreshed daily.