{"id":"CVE-2026-80895","url":"https://www.cyber-defence.io/tools/cve/CVE-2026-80895","generatedAt":"2026-10-28T02:11:39.587Z","title":"In the Linux kernel, the following vulnerability has been resolved: mshv: Order pt_vp_array publish against irqfd assertion path mshv_partition_ioctl_create_vp() initialises a VP struct (allocations, mutex_init, init_waitqueue_head, page mappings) and…","description":"In the Linux kernel, the following vulnerability has been resolved:\n\nmshv: Order pt_vp_array publish against irqfd assertion path\n\nmshv_partition_ioctl_create_vp() initialises a VP struct (allocations,\nmutex_init, init_waitqueue_head, page mappings) and then publishes the\npointer into partition->pt_vp_array.  Several ISR paths read this array\nlocklessly: the intercept ISR, the two scheduler ISRs, and\nmshv_try_assert_irq_fast() on the irqfd fast path.\n\nOf these, only mshv_try_assert_irq_fast() can structurally race the\npublish.  It runs from an eventfd waker without holding pt_mutex, and\nMSHV_IRQFD does not require the target lapic_apic_id (== vp_index) to\nrefer to an existing VP at registration time.  A user can therefore\nregister an irqfd targeting a yet-to-be-created VP, then trigger\nmshv_try_assert_irq_fast() concurrently with MSHV_CREATE_VP for the\nsame index.  On weakly-ordered architectures the reader can observe a\nnon-NULL pointer in pt_vp_array before the initialising stores to the\nVP struct become visible, leading to use of partially-initialised\nfields (e.g. vp_register_page).\n\nThe other ISR readers cannot reach this race: the hypervisor will not\ngenerate intercept or scheduler messages for a VP that has never been\ntold to run, and the user can only call MSHV_RUN_VP on the VP fd\nreturned by MSHV_CREATE_VP, which by construction is returned after\nthe publish.  Leave those readers as plain loads.\n\nUse smp_store_release() in mshv_partition_ioctl_create_vp() to publish\nthe pointer, and pair it with smp_load_acquire() in\nmshv_try_assert_irq_fast().  On x86 these compile to plain accesses\nunder TSO; on ARM64 they emit one-instruction acquire/release barriers,\nacceptable on this fast path.\n\nThe destroy-side path (destroy_partition() clearing pt_vp_array[i] to\nNULL after kfree(vp)) has a separate ordering and lifetime concern\nthat is out of scope here.","published":"2026-09-04T18:17:58.000Z","lastModified":"2026-09-04T18:17:58.000Z","status":"Received","sourceIdentifier":"416baaa9-dc9f-4396-8d5f-8c081fb06d67","cvss":null,"cwe":[],"affected":[],"epss":{"score":0.00166,"percentile":0.05843,"date":"2026-10-26","history":[]},"kev":{"listed":false},"exploits":{"count":0,"verified":false,"firstPublished":null,"source":"Exploit-DB (https://gitlab.com/exploit-database/exploitdb)","entries":[]},"verdict":{"level":"unknown","text":"Not yet scored. NVD analysis is pending; check back once CVSS and EPSS values are published."},"changes":[],"references":[{"url":"https://git.kernel.org/stable/c/062aa5dcc49a9ad96726a80c2a0ab0a1233bc2b9","source":"416baaa9-dc9f-4396-8d5f-8c081fb06d67"},{"url":"https://git.kernel.org/stable/c/b098dc869219c15dc49bf9cf63fb5fc1481d3373","source":"416baaa9-dc9f-4396-8d5f-8c081fb06d67"},{"url":"https://git.kernel.org/stable/c/eba2bf5daa7933f94c53ebbbf0f567d4274716df","source":"416baaa9-dc9f-4396-8d5f-8c081fb06d67"}],"sources":{"nvd":"https://nvd.nist.gov/vuln/detail/CVE-2026-80895","epss":"https://www.first.org/epss/","kev":"https://www.cisa.gov/known-exploited-vulnerabilities-catalog","exploitdb":"https://www.exploit-db.com/"},"licence":"CC BY 4.0 — link back to the CVE Explorer if you publish the results; upstream data remains subject to its own terms."}